UMI, the leading international travel, lifestyle and accessories brand, sets the stage for Fall 2025 with exciting new arrivals inspired by the city that never sleeps: New York.
Die mögliche Jagd auf die Wildgänse am Iserlohner Seilersee bringt viele Tierschützer auf die Barrikaden. Am Dienstag (08.07.) steht die nächste Demonstration an.#[Seilersee #Gänse]
Amarok 3.3 Released With The Music Player Ported To Qt6 / KDE Frameworks 6
Just over one year after the Amarok 3.0 release after a six year hiatus that brought it to Qt5 and KDE Frameworks 5, Amarok 3.3 is out today as the first version taking it to Qt6 and KDE Frameworks 6... phoronix.com/news/Amarok-3.3-R…
Just over one year after the Amarok 3.0 release after a six year hiatus that brought it to Qt5 and KDE Frameworks 5, Amarok 3.3 is out today as the first version taking it to Qt6 and KDE Frameworks 6.
awesome to hear that #Amarok is still around! I have fond memories of it from when I was still at uni, many, many years ago. I've actually been struggling to find a good desktop audio player so I'll give it another go for sure
Last month the Framework Laptop 12 began shipping as an upgrade-friendly, convertible 2-in-1 laptop that is friendly with Linux as we've come to expect out of Framework Computer devices.
Following all of the Linux and broader open-source software enablement around Power11 the past three or so years, IBM today formally announced their new Power11 hardware.
Here's an unexpected company match... GlobalFoundries announced today they have entered into a definitive agreement to acquire MIPS. Yes, the company formerly part of Wave Computing and before that Imagination and Silicon Graphics during its long history. MIPS in recent years hasn't been focused on its namesake CPU architecture but rather RISC-V core designs... phoronix.com/news/GlobalFounda…
Linux Patched For Transient Scheduler Attacks "TSA" Impacting AMD CPUs
Made public minutes ago is Transient Scheduler Attacks (TSA) as a new class of class of speculative side channel attacks affecting AMD processors... phoronix.com/news/Transient-Sc…
Framework 12 Platform Tuning For Better Performance Or Power Efficiency
Last month the Framework Laptop 12 began shipping as an upgrade-friendly, convertible 2-in-1 laptop that is friendly with Linux as we've come to expect out of Framework Computer devices. The launch-day Linux testing at Phoronix of the Framework 12 was done out-of-the-box on Ubuntu Linux with the defaults on it and the other comparison laptops tested. But as we've sho… phoronix.com/review/framework-…
IBM Announces Power11 With "99.9999%" Uptime, 55% Better Core Performance Than Power9
Following all of the Linux and broader open-source software enablement around Power11 the past three or so years, IBM today formally announced their new Power11 hardware... phoronix.com/news/IBM-Power11-…
AMD Hardware Feedback Driver Destined For Linux 6.17 To Benefit Heterogeneous CPUs
The AMD Hardware Feedback Driver has been queued up via a TIP branch for expected merging during the upcoming Linux 6.17 kernel cycle. This new open-source AMD driver is designed to help make the kernel's scheduler make better decisions around task placement for heterogeneous processor designs with a mix of the "classic" and "dense" cores... phoronix.com/news/AMD-Hardware…
I'm not entirely sure if their announcement of it being the "world's first" truly holds up, but I can't say I've seen anything like Rhythm of Resistance.
Fan Control Firmware Updated For Intel Battlemage Graphics Cards On Linux
In addition to Intel upstreaming the Xe3 graphics firmware needed for upcoming Panther Lake SoCs to linux-firmware.git so those firmware binaries can get picked up by Linux distributions ahead of Panther Lake laptops shipping, Intel also upstreamed fan control firmware as a first for their graphics card efforts... phoronix.com/news/Fan-Control-…
U-Boot 2025.07 is out today as the newest version of this popular open-source boot loader that is widely-used among embedded devices across different CPU architectures.
Ardour Digital Audio Workstation Drops GTK+ Option In Favor Of Its "YTK" Fork
The Ardour digital audio workstation (DAW) software has removed its build support for the GTK+ (GTK2) toolkit in favor of now exclusively relying upon "YTK" as its own localized fork of this toolkit... phoronix.com/news/Ardour-Remov…
The Ardour digital audio workstation (DAW) software has removed its build support for the GTK+ (GTK2) toolkit in favor of now exclusively relying upon 'YTK' as its own localized fork of this toolkit.
Those looking for mobile cooling for heat waves, camping and the like will be in good hands with the EcoFlow Wave 3. We recently reviewed the portable air conditioner in order to determine its strengths and weaknesses.
AMD Merges New RDNA 3.5 iGPU Firmware Files Ahead Of Next Product Launch
Interestingly a batch of new AMD GPU firmware files were upstreamed to linux-firmware.git yesterday in preparing for the next AMD product launch of hardware featuring RDNA 3.5 integrated graphics... phoronix.com/news/AMDGPU-Firmw…
FEX 2507 Brings New Optimizations & Gets Some Ubisoft Games Running
FEX 2507 is now available for this open-source emulator that allows running x86/x86_64 games and applications atop 64-bit ARM Linux devices whether they be AArch64 servers or ARM64 single board computers and other devices... phoronix.com/news/FEX-2507
The Thunderbird mail client developers today formally announced Thunderbird 140 as the newest Extended Support Release (ESR) for this cross-platform alternative to Microsoft Outlook.
Take this with a grain of salt, but I get that a modern SSD using 3D NAND gains around 0.05 picograms per terabyte of data stored. 0s are heavier and an empty SSD is all 1s.
Roughly going by the cell geometry and electron density mentioned in this paper, which works out to around 300 electrons per programmed cell, taking 150 as an average (whitening) and assuming TLC flash: jstage.jst.go.jp/article/elex/…
This does not apply to RAM since that uses capacitors, so you take electrons from one side and move them to the other, so no net weight change.
@ArabellaLovejoy @to Nitpick: DRAM is capacitors, but SRAM isn't. On the other hand, latches are usually symmetric, so they may balance out nicely, too.
@smochi @ArabellaLovejoy @to SRAM is also (gate) capacitors, just statically connected to the voltage rails via a feedback path instead of dynamically refreshed ^^
When I posed this question, I was expecting to get a chuckle, or perhaps a bit of philosophy, I'm astonished that I got this wonderful information in response to what I thought was a bit of whimsy.
@ArabellaLovejoy @to Strictly speaking, the gate capacitors do play a role, but they are not exactly designed to be the information carriers. If you build an SRAM cell with BJTs, it's the small hold currents and the transistor's switching thresholds that store the information. The same is true with FETs - the hold currents will just keep the gate capacitors in charged/discharged state continuously. But you're not wrong - you can totally look at this from different angles.
@eragon It's true with all 480Mbps and slower devices. For USB 3.0 SuperSpeed instead they just did a misleading marketing and the "5 Gbps" they advertise are instead 4 Gbps, but at least it's independent of what data you send. See my previous thread for some discussion on that...
@Ember It depends on the distribution of the bits. A file that is 90% zeros all in a row and 10% ones all in a row (1.6% overhead) would actually be slower than a pure random file that is 50/50 (0.8% overhead).
So, theoretically, you could make a faster transfer mechanism that counted the amount of 0s, and conditionally flipped every bit before and after the transfer? You would have to read the whole file twice though, so probably not a practical solution 😅
I suppose the encoding used forces a maximum number of contiguous ones by inserting symbols or something… or there's a special empty block frame like sparse files on disks?
Few people know it but the reason for this is very simple. While zeroes are round, a 1 has a sharp corner and a hook that could get stuck and damage the insulation around the copper if you would completely fill the line with ones. Instead, sending some zeroes every now and then to flush any stuck „1“ before a clog can develop.
A 0 can be neatly pushed through the copper at high pressure without damaging the cable.
It’s interesting to see how the standards evolved. Since USB 3.0 it uses an 8b/10b scheme, 3.1 Gen 2 moved to 128/132b. Do you know what kind of hardware improvements made this possible? Better clock stability of the transmitters?
A theory: I vaguely remember reading about signal formatting for telecom (probably elderly T1 signaling or similar) where a specific pattern of bits was used for control signals. If the data had this pattern, there was a workaround to allow it.
Perhaps the USB standard has some similar aspect, so the transfer has more overhead as the host has to constantly say “you’re not going to believe this, but there’s some more empty bytes coming.”
@recursive i can only conclude that USB 2 is a 12 Mbps physical layer that was unwillingly stretched to be 40 times faster with very little help to do that
Are there even any other half duplex cabling standards of that speed? Everything else I can think of moved to dedicated tx/rx lanes and better encoding long before (physical or logical like the 1GbE stuff).
Yeah but pushing that speed half duplex is itself part of the cursedness, and why the PHY is designed the way it is. Most well designed modern clock embedding systems are intended for unidirectional links.
@piggo @recursive @whitequark also, wouldn't having a separate differential pair for clock make it even more of a mess, since over a long cable it'd be hard to match the delays?
having the clock embedded, as you're describing, is easier to deal with than having a clock separately, right?
(although PCIe and HDMI do have a separate refclock... but they still do clock-and-data recovery on the data pairs too, right? Is the refclock only to get their PPLs in the right ballpark, to make the CDR lock quicker?)
@wolf480pl @recursive @piggo yes, it's mostly useful for power management (lets you disable the PLLs without worrying it'd take the CDR too long to lock)
it's also used for EMI (refclock is often spread spectrum modulated)
@whitequark @wolf480pl @recursive @piggo You can run PCIe without refclock, just with a separate oscillator on the device side, as long as spread spectrum is not used.
@wolf480pl @recursive @piggo you can do it with the host doing spread spectrum too, you just won't be EMI compliant on the device side (i've seen it done)
@whitequark @wolf480pl @recursive @piggo I thought that config was technically not compliant with the jitter/whatever specs for clock recovery? I'm sure it works anyway for some devices though...
@wolf480pl @recursive @piggo my understanding is that the tolerances on the clocks work out regardless of whether one side does spread spectrum or both
i'm not even sure it could be defined any other way, your elasticity buffer and skip insertion needs to be spec'd for the worst case (and it is, quite tightly in case of PCIe)
I've had to do CE/FCC validation for usb high-speed products before and part of the discussion there was what sort of dummy data to use, because the one-y data radiates a bunch more than zero-y data
Matt (It's really me) Hartley
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